Binary universal code keyer



R. S. NIELSEN BINARY UNIVERSAL CODE KEYER Original Filed Aug. 8, 1958 '7Sheets-Sheet l 8 CODED 'L I b GATE TONE a OUTPUT 75 N 1. NOT AND 68\ 454CLOCK cooqsw. PULSE FLIPQ! FLOP GEN.

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n 9/ DELAY 78 54 d b A f CONTROL N FLIP|FLOP 7 b O l 5 QNOT AND 33/ s0s3 8 4 x H (S {8 z b b, 589 49 i O )0 O @EEJENQNMMM 22 START 20 eon 2020d 20e 20 20 I0 5 52 p b 2 ULSE 1821 l8b lc I8d lee I8? 18k AND cn-SEQUENCE COUNTER COUNT RESET 6/ 55 REINALD S.NIEL,SEN

INVENTOR.

p 1965 R. s. NIELSEN 3,206,743

BINARY UNIVERSAL CODE KEYER Original Filed Aug. 8, 1958 7 Sheets-Sheet 2CLOCK PULSES l5 lllllllllllllllllllIIIIIIIIIIII START PULSE I CONTROL FFll AND l2 AND 22 AND 32 NOT AND 23 CODE FF 2| OR l4 CODE FF 3| NOT ANDl3 NOT AN D 33 TIME COUNTER 20a OUTPUTS 20 RE] NALD S.NIEI S ENINVENTOR.

Sept. 14, 1965 R. s. NIELSEN v BINARY UNIVERSAL CODE KEYER OriginalFiled Aug. 8, 1958 '7 Sheets-Sheet 'T J 26MMWWM I MN HK Z m om ow ooh 5?XMQQQQO R X m: #2 2 12 n: Q9

\wmxmrh m 8:5 3: fi v w 43 m W om 8 :5 X8 8m 6w :8 ow 3N ow n3 8 now 3NwkDmkDO RE! NALD S.N|ELSEN INVENTOR BY a g /7% W United States Patent3,206,743 BINARY UNIVERSAL CODE KEYER Reinald S. Nielsen, Carlisle,Mass, assignor to Link Division of General Precision, Inc., Einghamton,N.Y., a corporation of Delaware Continuation of application Ser. No.754,041, Aug. 8, 1958. This application Oct. 9, 1962, Ser. No.

Claims. (Cl. 34tl--365) This invention relates to transmission signalkeyers and more particularly to a device which automatically sequences aseries of Morse code-like signals into a signal transmission system bythe use of bistable switching cir cuits. The application is acontinuation of my copending application Serial No. 754,401, filedAugust 8, 1958.

In a grounded aviation trainer or simulator, apparatus is providedwhereby simulated signals, representing radio stations, are presented tothe student in the trainer to simulate actual flying conditions. Thesesignals are presented in the same manner that the pilot of a realaircraft would receive radio signals if the plane were actually flyingthe selected course relative to actual radio stations. Such simulatedsignals may be used to duplicate the A-N signals of a low frequencyradio range, the visual and aural signals of an omini-directional range,or any other signals transmitted in conjunction with a homing ornavigation system, etc.

These signals are usually transmitted in a prearranged message patternto identify a certain radio station. The station identification signalsare usually of a Morse codelike nature (dot, dash, and space intervals).Each station is assigned its own particular set of stationidentification letters, or call letters, which are transmitted andreceived by the pilot or student flying the real aircraft or thesimulator.

In the past, the sequence of dots and dashes, which composed the stationidentification signals have been produced by code type devices whichcontrol oscillators used to produce the signal, relay operated devicesset in a prearranged sequence or else by a series of cams which areplaced on a rotating shaft and arranged to key a circuit when the camrise trips the cam follower at a predetermined position.

The disadvantages inherent in these semi-mechanical devices are obviouswhen it is considered that the code tapes often tear or the code tapedrive system breaks down, that relays often go out of adjustment, thatthe cam operated arrangement is difiicult to set up into a prearrangedsignal sequence, and that a change from one prearranged signal sequenceto another entails considerable effort.

The present invention overcomes these disadvantages by providing anall-electronic signal keyer, which utilizes bistable switching circuitsto produce accurately timepropontioned Morse code elements in anydesired code sequence. A series of multi-position switches are providedand the bistable circuits are switched on and off in accordance with thesettings of the switches. The setting of an individual switch determineswhether the bistable circuits will produce a dot, a dash, an interletterspace, or will stop the signal sequence. The switches are used to set upany signal sequence and changes in the sequence can be made rapidly witha minimum of etfort.

Once the system is set into operation, the signal keyer will produce thedesired sequence of code elements until stopped. Using the presentsystem, it is also possible to provide means for rapidly changing thetime interval in which the station identification letter sequence istransmitted (message speed) and still maintain a fixed ratio of timeduration between the dot and dash elements.

3,206,743 Patented Sept. 14, 1965 It is therefore an object of thisinvention to provide an all-electronic signal keyer which is capable ofproducing a desired sequence of Morse code-like signals.

Another object of this invention is to provide a signal keyer that doesnot employ mechanical or electromechanical moving parts in theproduction of a signal sequence.

A further object of this invention is to produce a signal keyer whichutilizes bistable switching circuits in the production of the letterelements.

Yet another object of this invention is to provide a novel signal keyerwhich utilizes bistable switching circuits to preserve the regiment ofelement time lengths regardless of the rate at which the signal keyer isoperatmg.

Still a further object of this invention is to provide a novel signalkeyer wherein the code sequence is created by the setting of a series ofswitches.

Other objects and advantages of this invention will be more apparentupon referring to the accompanying specification and drawings, in whichFIG. 1 is a block diagram of the sign-a1 keyer;

FIG. 2 is a graphical representation of the signals present at variouspoints in the system;

FIG. 3 is a schematic representation of an exemplary keyer controlcircuit;

FIG. 4 is a schematic representation of an exemplary code elementgenerator;

FIG. 5 illustrates a basic transistor bistable (flip-flop) circuit;

FIG. 6 illustrates a partial block diagram of the system, and

FIG. 7 is a schematic representation of an exemplary binary tohexadecimal translator.

As previously stated, radio stations are usually identified by thetransmission of a series of Morse code letters, usually three in number.Each letter is composed of a series of elements, an element being a dot,a dash, or an inter-element space. In the composition of an element, theratio of dash to dot length is ideally preserved at 3 to l, i.e., a dashoccupies three times the time interval of a dot. Between each of theelements of the letter a space equivalent to one dot length ismaintained. The amount of time allotted for the space between twoletters, the inter-letter space, is equal to the period of a dash, whichin turn is equal to the period of three dots. The time interval afterthe call letter message can be of any duration and is determined by theparticular radio facility being used or being simulated.

In the present system, a plurality of multi-position switches represent,as set-up, a sequence of dots, dashes and inter-letter spaces. Provisionis also made whereby any one of the switches may terminate the messagesequence. The switches are sequentially interrogated by a countercircuit which is set into operation when a start pulse is applied to thesystem. As each switch is interrogated, it sets into operationcircuitry, according to the switch position selected, which produces asignal representative of a dot, dash, inter-letter space or a signal toterminate the message sequence.

The circuitry controlled by the series of switches comprises logicaland, not and, and or elements plus elements of the bistable, flip-floptype, which have two stable states. For the purposes of thisapplication, and as is well known in the art, the two stable states canbe considered as an on or 1 output condition and an off or 0 outputcondition. When the bistable element is in the on state a positiveoutput voltage, representative of a binary 1, is produced. In the offstate, a less positive voltage, or binary 0, is present at the output ofthe bistable element. It should also be noted that, for presentdiscussion, a positive Voltage pulse is assumed necessary to change thestate of a bistable element from an on to off condition, or vice-versa,and that a negative voltage pulse applied to the bistable element willnot accomplish this result. The pulse used to change the bistableelement from the ofi to on state to l) is called a set pulse. The pulseused to change the bistable element state from on to off (1 to 0) iscalled a reset pulse.

Conventional logical and and not and circuits are furnished with two, ormore, input signals. In the in stance of a two input and circuit, thepresence of sig nals at one input and at the second input is required toachieve a signal at the output of the and circuit. Similarly, a twoinput not and circuit requires the presence of a signal at one input andno signal at the second input to achieve a signal at the output of thenot and circuit. Logical or circuits have two, or more, inputs, andproduce an output signal when a signal is present at any input. Forconvenience in the ensuing discussion, the inputs to and and not andcircuits will be labeled as a and b with b the not input of the not andcircuits.

When the code keyer circuitry is in operation, as represented by thestate of a control flip-flop, a signal representative of the selecteddot or dash is fed to a gate circuit and acts as a gating signal toallow the tone signal generated by a continuously operating audiofrequency signal generator to reach the output circuit of the system.The duration of the gated tone is selected by the switches, since theycontrol the period that the code keyer circuitry produces the gatingsignal and also the period during which the code generator circuitrydoes not produce a gating signal. The no gating signal or silenceintervals are representative of the inter-element and inter-letterspaces or the end of message, and do not allow the tone signal to bepresent at the output circuit of the system.

The signal keyer system is synchronized by means of synchronizing ortiming pulses, which are produced by a clock pulse generator. The clockpulses control the fundamental dot element time duration. Variation ofthe frequency of the clock pulses varies the rate of operation of thesignal keyer system, but due to the use of the binary circuitry theregimen of a dash and an inter-letter space both being equal to theperiod of three dots is always preserved.

Referring to FIGURES 1 and 2, the operation of the system is describedas follows. In FIG. 1, the rotating arms of a series of multipositionswitches, a 10b, 10c, 111d, 10e, 10f etc., which comprise switching unit10, are connected through respective diodes 18a, 18b, 18c, 18d, 18c, 18etc., to the outputs 20a, 20b, 20c, 20d, 20e, 20f etc. of a sequencecounter 16. Each of these switches 10a10f etc. is a four position switchhaving stationary contacts, reading in a clockwise direction, S1, S2, S3and S4. On each of these switches the contact position S1 represents thedot element, S2 the dash element, S3 the inter-letter space element, andS4 the stop signal element.

There are as many switches 10a etc. as there are counter outputs 211aetc. of the sequence counter 16, each of the switches being connected toan output line of the counter 16, through a respective diode 18a etc. Inthe embodiment of the invention shown, 16 switches are used tocorrespond to a Modulo 16 Counter, which is described in detail. Theinvention can be extended by utilizing counters of higher moduli.

In order to describe the signal keyer system an illustrative example isused, wherein the system is set up to generate the letters B, K, T. Thisis represented in the switching unit 10 by setting the switch 10a to theS2 dash position and setting the switches 10b, 10c and 10d to the S, ordot position to represent the letter B, which consists of the sequenceof a dash and three dots. Switch 10eis set to the S3 inter-letter spaceposition to provide a space between the letter B and the first dashelement of the letter K which is represented by switch 10] being set tothe S2 position. For the sake of simplicity, the remainder of theswitching sequence arrangement for generating the letters is not shownin FIGURE 1, but the corresponding waveforms are given in FIGURE 2.Switch 10k is set to the S4 stop position to end the sequence of messagetransmission.

To set the code keyer into operation, a start pulse, shown at line B ofFIGURE 2, is applied to input a of the control flip-flop 11 over line 50when switch 49 is closed. Throughout this specification all flip-flopcircuits will be designated with inputs a and c and with respectiveoutputs b and d. Flip-flop circuit 11 is of the conventional type whichhas two stable states. In the present invention for the purposes ofcompactness and better switching, transistor flip-flop circuits areused. A typical flip-flop circuit is shown in FIGURE 5, and is describedlater. The start pulse applied to input a of control flip-flop 11 setsthe circuit into one of its stable states of operation. In this instanceoutput 12 of the flip-flop circuit produces a positive voltage output,and output d a less positive output voltage. The output I) of flip-flop11 is shown on line C of FIGURE 2. Flip-flop 11 re mains in this state,i.e., the left-hand section conducting and producing a 0 at output d andthe right-hand circuit non-conducting and producing a 1 at output I).

The output of clock pulse generator 15, shown on line A of FIG. 2,consists of a series of positive pulses occurring at regularly timedintervals. The clock generator 15 may be any suitable type, for example,a continuously operating multivibrator circuit. The clock pulsegenerator 15 utilized in this invention is well-known in the art and itsdetails form no part of the present invention. The clock pulses areapplied over line 52 to input a of and circuits 12 and 22.

The 1 output from b of control fiip-flop 11 is applied over line 51 toinput b of and circuit 12. The other input, a, of and circuit 12receives clock pulses from the clock pulse generator 15 over line 52.The and circuit 12 is of the conventional type which produces a signalon line 53 upon the simultaneous occurrence of signals at inputs a andb, from input lines 51 and 52.

The 0 from the d output of the control flip-flop 11, is applied overline 54 to input b of a second and circuit 22. Input a of and circuit 22receives clock pulses from clock pulse generator 15 over line 52. Thesimultaneous occurrence of a positive pulse and a 0 at the inputs of ancircuit 22 keeps the output of the circuit at line 55 in a 0 condition.The output of and circuit 22 is shown on line E of FIGURE 2 where it isseen that positive pulses appear at the output line 55 only when the doutput of control flip-flop 11 produces a 1 output. This arrangementkeeps the sequence counter 16 from being reset to another operating modeby keeping pulses off line 55, the sequence counter reset line, whilethe signal keyer is producing a message.

In order to generate a dash element, as previously set up on switch 10a,assume that the sequence counter 16 is producing a positive voltage atcounter output 29:: and is thereby interrogating switch 10a. Counteroutput 20a is shown in FIG. 2 as are the other counter outputs 20bthrough 20k. The positive voltage present at contact S2 of switch 10a isapplied over line 58 to input b of and circuit 32. And circuit 32receives its a input over line 53 from and circuit 12, which passes theclock pulses from clock pulse generator 15 during message generation.The output of and circuit 32, which is shown on line F of FIGURE 2, isapplied over line 60 to input a of a code generator flip-flop 21.

The and gate 32 is made operative by the interrogating voltage appliedfrom the counter output 20a via switch 10a, over line 58 for a periodsuflicient to allow four clock pulses to appear at the output 60 of and"circuit 32. Code-generator flip-flop 21 is similar to control flip-flop11 except that there is only one input to which the set and reset pulsescan be applied. The pulses at the input a of flip-flop 21 switch codegenerator flip-flop 21 from one stable state to another.

The first clock pulse applied to input a of code generator flip-flop 21sets the flip-flop. Consecutive clock pulses appearing at input a resetand set flip-flop 21 with a positive output voltage oppearing at 11 eachtime the flip-flop is set. Line H of FIGURE 2 shows the sequence ofvoltage levels at output d of flip-flop 21 as the four pulses,illustrated on line F of FIG. 2, are applied at input a.

The output voltage, shown on line H, is applied to one input of a firstor circuit 14 over line 62 and also to an input of a second or circuit24 over line 64. Application of the output voltage from code generatorflipfiop 21 to or circuit 14 over line 62 results in a derived triggerat input a of a second code generator flip-flop 31. The derived triggeris conveyed over line 66 to input a of flip-flop 31 and is illustratedon line I of FIG. 2. Successive input pulses to flip-flop 31 input acause the code generator flip-flop 31 to produce output voltages at d asillustrated on line I of FIG. 2. The outputs of the two code generatorflip-flops 21 and 31 are transmitted to the second or circuit 24 toproduce an output voltage on line 70 shown at K of FIGURE 2. Thiswaveform is conveyed over line 70 to input a of not and circuit 13 andover line 87 to input b of circuit 33.

The waveform present on line 70 is a combination of the outputs of codegenerator flip-flops 21 and 31 brought about in the logical or circuit24. One may readily recognize that the time duration of a dash elementof the waveform on line K is precisely three times the period betweenclock pulses of line A. Thus, the Waveform of line K corresponds to aMorse code dash or a Morse code dot of time duration equal to an oddmultiple of the clock pulse period.

The waveform at the output of not and circuit 13 is applied to gatecircuit 42 over a line 75. The b input to gate circuit 42 is from acontinuously operating signal generator 17 which generates the signalproducing the tone output. The tone signal may be used to set either anaural or a visual receiving device. When a positive voltage is presenton line 75 it opens gate 42 so that the output of the tone signalgenerator 17 is present at the coded tone output line 80. Gate circuit42 may be of any conventional design and would be generally similar toand circuits 12 and 22.

As mentioned above, the output of or circuit 24 via line 87 is appliedto the b input of circuit 33. The effect of this signal (shown on line Kof FIG. 2) is to block the delayed clock pulses appearing at input a ofcircuit 33 from entering sequence counter 16 via line 89. The clockpulses are delayed by convention delay circuit 19 to avoid difficultiesthat might occur if sequence counter 16 was changed with a dash, or dot,code element is being generated. The output of circuit 33, on line 89,is illustrated on line M in FIG. 2.

In this invention, the dot length waveform is generated by the samecircuitry creating the dash waveform by causing the clock pulses fromclock pulse generator to be applied directly to code generator flip-flop31 by means of another not and circuit 23 and or circuit 14. In thiscase switches 10b, 10c, and 10d are each set to the S1 position in orderto create a dot waveform. The outputs 20b, 20c, 20d, etc. of sequencecounter 16, interrogating each of switches 10!), 10c and 10d terminateat an unconnected contact S1. Therefore, there is no 1 signal applied tothe 12 input of not and circuit 23 as there was during the generation ofthe dash element. Clock pulses appearing on line 53, therefore, passthrough and not and circuit 23 and appear over line 84 at an input of orcircuit 14. Since there is no 1 input on line 58 to and circuit 32 inputb, there will be no clock pulses fed to code generator flip-flop 21, andthere- 6 fore no output signal from the code generator flip-flop 21 asshown on line H.

A series of pulses are present at input a of flip-flop 31 during thetime when flip-flop 21 is not active. These pulses originate at theoutput of or circuit 14 on line 66. This is shown at line I of FIGURE 2following the first four pulse positions which are provided by flip-flop21 acting on or 14. These pulses will set and reset code generatorflip-flop 31 to produce an output at d (line 68) as shown on line I ofFIG. 2 (following the dash pattern). This output is applied, via line68, to or circuit 24, and appears at output line 70 as shown on line Kof FIG. 2. Feeding through not and circuit 13, the signal appears online 75 of FIG. 1 to enable gate 42, as in the case of dash generationdescribed above.

A basic feature of the invention has been implicit in the description ofdash and dot generation. Namely, the odd-multiple element time lengthshave been adapted to the binary number system.

For correctly proportioned Morse code generation, various code elementsare conventionally defined in multiples of a dot element time length.Thus, a dash is three dot lengths, space interval between dots anddashes within a letter is one dot length, spaced interval betweenletters is three dot lengths, etc. To accommodate the odd multiples(one, three, five, etc.) to a binary counting system, it is convenientto consider the fundamental dot, dash, and silence interval to have adot length silence interval appended.

Accepting this convention, it becomes possible to create a dot period bymeans of two clock pulses fed to a flip-flop stage; considering theflip-flop to be initially in the silence condition, the first pulse willturn a tone ON and the second pulse will turn it OFF. Obviously, a thirdpulse cannot turn the tone ON again until one clock pulse periodelapses. A flip-flop fed a continuous series of clock pulses wouldproduce a continuous series of dots alternating with dot lengthsilences.

To create a dash that is three dot lengths equivalently, one may feedclock pulses to a two stage binary counter (cascaded flip-flops). Referto waveforms labeled Code FF 21 (line H) and Code FF 31 (line J) of FIG.2; the pulses shown on line F are to be considered the input to Code FF21. The first pulse to FF 21 turns it ON and the second pulse turns itOFF, while the carry from FF 21 turns FF 31 ON. At the third pulse, FF21 turns ON again and on the fourth pulse it turns OFF, creating a carrythat turns FF 31 OFF. Inspection of FIG. 2, lines H and I, shows thatCode generator 21 and/or Code generator 31 are ON during the timeinterval between the first and fourth clock pulse, and after the fourthpulse, both flip-flops are OFF. By summing the outputs of FF 21 and FF31 by means of an OR circuit, the OR circuit output can be used to turna tone ON during the interval included between the first and fourthclock pulses.

Obviously, a fifth clock pulse cannot start a repetition of the aboveoperation until the elapse of one clock pulse period after the fourthpulse. An OR circuit responding to the outputs of two cascadedflip-flops fed a con tinuous series of clock pulses, would produce acontinuous series of dashes alternating with dot length silences.

Longer silence intervals can be created by modifying the dot generatorfunction. Since both the dot and the dash code elements are followed bydot length silence intervals, a three dot length silence can be achievedby creating a dot but preventing it from switching ON the tone. Thus,the dot length silence interval following a dot or dash element will befollowed by a second dot length interval, during which the dot tone issuppressed, and a third dot length interval corresponding so thatnormally following a dot element. By this means, it is possible tocreate silence intervals corresponding to any odd multiple of thefundamental dot time length.

In FIG. .1, the inter-letter space for the B and K letters of thesuggested exemplary message, is produced by setting switch 10e to the S3position. When switch 10c is interrogated by output 20e of sequenceconuter 16 a voltage is applied over line 78 directly to the b input ofnot and circuit 13. In the meantime, there is a signal at the b input ofnot an circuit 23, since line 58 receives no signal for the counter 16,and a dot element is produced on line 70 in the same manner aspreviously de scribed. When these two signals, from line 70 and fromline 78, appear at the inputs a and b of not and circuit 13, there is a0 output from the circuit on line 75, as shown on line L, in the spacebetween the B and K. When there is no positive voltage on line 75, gate42 is disabled and there is no tone present on output line 80.

To stop the sequence, switch k is set to the stop position S4. Thepositive pulse appearing at the output 2011 now passes through theswitch and is conveyed over line 88 to the 0 input of control flip-flop11. Receipt of this pulse resets flip-flop 11 and causes a 0 signal toappear at the b output on line 51. This 0 signal disables and circuit 12via input 11, and no clock pulses reach the code generator flip-flops 21and 31. Output d of control flipflop 11 now produces a 1 signal which iscoupled over line 54 to input b of and circuit 22. Input a of andcircuit 22 receives clock pulses from the clock pulse generator 15.Under these conditions clock pulses appear on reset line 55 and resetthe counter 16 so that an output appears at 20a. If none of the switchesof switch unit 10 are set to the S4 stop position, the counter 16 willcontinuously operate. To accomplish this, any unusued switches are setto the S3 inter-letter space position.

It is also possible to periodically generate a message at fixed instantsof time with the code-keyer. For example, suppose it is desired totransmit a message (three or four letters), which has a time duration ofonly a fraction of a minute, at one minute intervals. This may beaccomplished by setting the switch immediately following the last letterelement to the S4 stop position. After the generation of the last letterthe system stops and is restarted only upon application of a start pulseover line 50. By connecting a suitable start pulse generator to line 50which generates pulses at the desired intervals, here equal to oneminute, the code-keyer generates a message at one minute intervals witha period of silence following each message. The period of silence may beused to convey other types of information to the pilot or student, asfor example, weather A-N signals, the omni-range V signal, or likeinformation.

Referring to FIGS. 27, the circuitry of the various flip-flops, andcircuits, or circuits and not and circuits is now described. In thesefigures, similar reference characters are used to designate similarelements, circuits, and points of signal occurrence denoted, in FIG. 1.

FIGURES 5, 6 and 7 illustrate circuitry for the sequence counter 16 ofFIG. 1. FIGURE 5 illustrates a common flip-flop circuit employingtransistors as active elements. Circuit descriptions and design data forsuch a circuit may be found in Handbook of Semiconductor Electronics,Lloyd P. Hunter, Ed.: McGraw-Hill, New York 1956; Section 15.10, p. 38.

In FIGURE 6 is shown, in block form, the connection of four flip-flopsin cascade to form a 2 binary counter chain. Outputs from the fourflip-flops, designated as 41, 51, 61, and 71 in FIG. 6, are carried viaoutput lines 101 through 108 to the binary-hexadecimal translator 700.The binary-hexadecimal translator converts the input voltages, atterminals 101-108 in FIGURE 7, corresponding to a binary number to anequivalent hexadecimal output appearing in numerical sequence at outputsa through 2011 and the Stop Pulse terminal. Again, the circuit of thetranslator is well known, forms no part of the invention, and isdiscussed in the volume High Speed Computing Devices, EngineeringResearch Assoc. Staff: McGraw- Hill, New York 1950; Section 4-3-4, p.40. One departure from the reference is the use of buiferdiodes, 18a

through 18m of FIG. 7, to minimize loading effects on the translatordiode matrix; this standard technique is also described in High SpeedComputing Devices.

FIGURE 6 is the block diagram of a signal keyer that may be set to anythree-letter Morse code combination. Since the greatest number of dotsand dashes used with any Morse letter is four, the number of code set-upswitches required is 14 to take into account the two interletter spacesrequired in a three-letter group. The 14 outputs, 20a through 20m oftranslator 700 are fed via code set-up switches 10 to dash and spacecommand lines 58 and 78. It is apparent that the number of code elementshandled by the keyer system, 14 in the present case, can be expanded anyquantity desired by increasing the binary counter chain, modifying thetranslator, and increasing the number of code set-up switches.

The control circuit and code generator of FIGURE 6 remain to bedescribed. FIGURE 3 illustrates, in detail, the control circuit thatincludes the functions of items 11, 12, 19, 22 and 33 of FIG. 1. Theflip-flop, shown in block form in FIG. 3, is identical, in detailedcircuitry, to FIG. 5.

The circuit of FIG. 3 employs PNP and NPN types of transistors utilizingbias supplies of both positive and negative polarity. Alternatelypositive and negative going clock pulses must be applied to the circuitat the terminal indicated. Capacitor 303 prevents D.C. levels existingon line 52 from short circuiting through the clock pulse generator.

Assume the signal keyer is inoperative, i.e., there is no code outputbeing generated. In this case output 0! of the flip-flop is in the 1 orpositive condition, causing the collector of translator 320 to besimilarly positive. Transistor 320 is employed as a grounded,common-collector emitter-follower to isolate output d of the flip-flopfrom the attached load. With line 54 held positive by the collector oftransistor 320, the and circuit comprised of diodes 325 and 335 andresistor 322 passes positive going clock pulses from line 52 via diode335 to the base of transistor 330. Transistor 330 is also employed as anemitter follower and isolates the and circuit from the reset line loadattached to line 55.

So long as these conditions maintain, clock pulses are fed from thecontrol circuit via line 55 to the reset inputs of flip-flops 41, 51,61, and 71 of FIG. 6. Due to the detailed circuit arrangement, output20a of translator 700, FIG. 6, is maintained positive. This outputcondition is illustrated on line 20a of FIG. 2.

Resistor 345 receives, via line 311, the positive potential at thecollector of transistor 320. As result, the base of NPN transistor 340is carried to a positive potential such that the collector of transistor340 is held near ground potential. Resistors 345 and 343 are selected invalue such that the negative clock pulses, existing on line 52, arrivingat the base of transistor 340 via 343, do not override the positivepotential established by means of resistor 345. During the inoperativecondition of the signal keyer, no pulses appear on line 89 which feedsthe counter input (refer to FIG. 6).

While output at of the flip-flop used in the control circuit, FIG. 3, ispositive, output b is close to zero or ground potential. Therefore, thecollector of transistor 300 remains near ground and the and circuitcomposed of diodes 305 and 315 and resistor 302 does not passpositivegoing clock pulses. Thus no pulses can appear on line 53 whichconnects to the code generator.

Closure of switch 49 permits a positive pulse from line 52 to set theflip-lop via terminal a; this positive pulse corresponds to the startpulse of line B, FIG. 2. Output d of the flip-flop in FIG. 3 falls tonear zero potential while output 1) assumes a positive potential. Thusthe and circuit (items 325, 335, 322) feeding transistor 330 no longerpasses pulses, and pulses no longer appear on reset line 55.

The positive voltage on line 51 causes the collector of 9 emitterfollower transistor 300 to become positive and enable the and circuitcomposed of items 305, 315 and 302. Positive clock pulses therefore feedthrough the and circuit to the base of emitter follower transistor 310and appear on the transistor collector and thence line 53. Line 53carries the pulses to the code generator circuit (refer to FIG. 4 andFIG. 6).

With output d of the flip-flop near Zero, line 54 is near zeropotential. Therefore, the positive potential fed to the base oftransistor 340 via resistor 345 no longer exists. As a result, thenegative going clock pulses delivered to the base of grounded emittertransistor 340 cause the base to be carried negative at instantsintermediate to the occurrence of positive pulses on line 53. Thecharacteristic signal inversion property of the grounded emitter stagecreates a positive going pulse at the collector of transistor 340 andthus on line 89. By the use of the alternately positive and negativeclock pulses on line 52 it is possible to achieve the purpose of thedelay means indicated as item 19 in FIG. 1.

A third input to the base of transistor 340 is provided by line 87 viaresistor 341. A positive potential applied to line 87 will prevent theappearance of positive pulses on line 89 in the same manner that thepositive potential applied via resistor 345 did so. The necessity forthis pulse inhibiting action will be brought out in the discussion ofthe code element generator to follow.

Details of the code element generator circuitry are shown in FIG. 4.Again, the flip-flops indicated in block form may be identical to thoseshown in FIG. 5. For discussion, we may assume that the code set-upswitches have been set to produce the first letter B and that the actionto be described is that following the action of the start pulsedescribed above. Both NPN and PNP transistors and positive and negativebias potentials are also employed in the code element generator.

The initial dash of the letter B implies that the code set-up switchesdeliver the positive voltage existing on line 20a of FIG. 2 to the dashcommand line 55 of FIG. 1 and FIG. 4. Delivered to the base of groundedemitter transistor 400 via resistor 412, the positive potential on line58 causes the collector of transistor 400 to fall near ground. As aresult, the and circuit composed of items 405, 415 and 401 does not passthe positive clock pulses appearing on line 53. These pulses originateat the corresponding line 53 of FIG. 3.

In FIG. 4 again, the low potential at the collector of transistor 400,coupled via resistor 413, causes the base of grounded emitter stage 410to go negative in potential. The collector of transistor 410 becomespositive and this potential is coupled via line 58 to code generatorflip-flop 21, reset input 0 and diode 425 of the and circuit composed ofitems 425, 435, and 411. As a result, the positive pulses appearing online 53 are passed by the and circuit to line 60 and thence to the inputof binary connected flip-flop 21.

Items 425, 435, and 411 correspond to the and circuit designated as item32 in FIGURE 1. The positive pulses passed by the and circuit, in thepresent instance, correspond to the first four pulses of line F, FIG. 2.Code generator flip-flop 21, of FIG. 4, responds to the input pulses online 60 to create an output voltage at terminal d and line 62 such as isshown on line H of FIG. 2. Coupled through resistor 414, FIG. 4, thepotential on line 62 is applied to the base of emitter followertransistor 420. The resultant potential at the collector of transistor420 is coupled via diodes 455 and 455 to the input a of code generatorflip-flop 31 and resistor 431.

Diode 455 forms one item of an or circuit (item 14 of FIG. 1) comprisingdiodes 44-5, 455, and resistor 421. The potential applied to line 65 viadiode 455 results in a derived trigger pulse sequence as illustrated online I in FIG. 2. Code generator flip-flop 31, in binary connection,reacts to these pulses to produce an output (at d in FIG. 4) asillustrated on line I of FIG. 2.

Diodes 465 and 475 with resistor 431, in FIG. 4, constitute an orcircuit (item 24 of FIG. 1). Therefore, the voltages on line 64 (referto line H, FIG. 2) and line 63 (refer to line 1, FIG. 2) produce avoltage on line '70 as illustrated on line K of FIG. 2. The voltage online 70, FIG. 4, is coupled via resistor 431 to the base of emitterfollower transistor 430, and essentially appears at the collector oftransistor 430. The positive voltage, during the interval of the dash,at the collector of transistor 430 is carried to the trigger pulseinhibitor input of FIG. 3 and of FIG. 6 via line 87.

The function of the trigger pulse inhibitor is to prevent the removal ofthe positive voltage appearing at the 20a translator output of FIG. 6that is carried to the dash command input of the code element generatoron line 58. Since the binary counter chain essentially establishes theoutput at 20a, the elimination (inhibition) of pulses to the counterchain input holds the positive output at 20a. This action is illustratedon lines M and 20a of FIG. 2. On line M are shown the input pulses tothe counter chain, inhibited during the dash interval, while the 20aoutput of the translator is shown on line 20a. The trigger inhibitfunction described here corresponds to item 33 of FIG. 1.

When the fourth pulse has occurred at the input a of code generatorfiip-flop 21 (refer to line F, FIG. 2) of FIG. 4, the potential at thecollector of transistor 430 has dropped to near Zero potential (refer toline K, FIG. 2). Therefore the trigger inhibitor action no longer occursand a pulse is delivered via line 89 from the control circuit, FIG. 3,to the counter chain. This pulse is illustrated on line M of FIG. 2 andthe resultant change in translator output on lines 20a and 2%. Since theremaining three elements of the letter B are dots, there is noconnection of translator output 20b to the code element generator.

Returning to FIG. 4, dash command line 58 is near zero potential, withthe result that the base of transistor 400 is carried negative viaresistor 412. Transistor 400 collector assumes a positive potentialunder these conditions, and the and circuit (items 405, 415, 401) isenabled. With transistor 400 collector positive, the base of transistor410 is carried positive via resistor 413 and transistor 410 collectorfalls to near ground potential; the and circuit composed of items 425,435 and 411 does not pass positive pulses.

The item 405, 415, 401 and circuit passes positive pulses via diode 445to line 66 connected to input a of code generator flip-flop 31. (Items405, 415, and 401 with transistor 400 correspond to item 23 of FIG. 1.)Diode 445 was mentioned above as part of an or circuit; it correspondsto a portion of item 14 of FIG. 1. The pulses passed by diodes 445 and455 (parts of item 14) are illustrated on line I of FIG. 2.

Code generator flip-fiop 31 of FIG. 4 responds to the the pulses on line66 by producing an output at terminal d as illustrated on line I of FIG.2. Coupled via diode 475 and resistor 431, FIG. 4, a similar voltageappears at the base and thence at the collector of transistor 430.

The action above described in the formation of a dot interval continuesthrough the remaining two clot elements of the letter B. To provide therequired interletter space between the B and a succeeding letter, thecode setup switches have been set to feed the 20c output of translator700, FIG. 6, to the space command line 78 of FIG. 6 and FIG. 4. Sincethe space command voltage does not affect the circuits corresponding toitems 23 and 32 of FIG. 1, a dot element is generated as before. This isillustrated as the fourth dot interval on line K of FIG. 2. The voltageshown on line K FIG. 2 corresponds to that occurring at the collector oftransistor 430, FIG. 4.

The voltage at the collector of transistor 430 is coupled via diode 485to the collector of transistor 440. When the space command voltage ispresent on line 78 and thence at the base of grounded emitter transistor440, the collector of transistor 440 is held near ground potential.Therefore the positive potential corresponding to a dot,

occurring during the space interval, does not appear at the collector oftransistor 446 or line 75. Transistor d ill with diode 485 correspondsto items 13 of FIG. 1. Thus, at the collector of transistor 440, line'75, of FIG. 4, a voltage waveform is created that is analogous to thedot, dash, and space intervals of a Morse code letter symbol.

Items 495, 496 and 497 of FIG. 4 correspond to item 42 of FIG. 1. Thevoltage waveform appearing at transistor 440 collector, FIG. 4, iscoupled via a click suppressing RC network to diode 495; and audiofrequency signal applied to line 81 is coupled to the cathode terminalof diode 496 which is held at a positive potential in respect to groundby a resistor network. Therefore, during each interval that transistor 450 collector is positive, an audio frequency signal appears on line 80,the audio output line.

It was mentioned above that the voltage appearing at the collector oftransistor 410 is coupled to the reset input of flip-flop 21; similarly,the reset pulses appearing on line 55 in FIG. 3 are carried to resetinput 0 of code generator flip-flop 31 in FIG. 4. These reset inputs areintended to assure that the code generator flip-flops always start fromthe correct state at the start of each code element and code sequence.

The above descibed circuits are representative only of a preferred meansby which the principle of the signal keyer may be implemented. It wouldbe obvious to one skilled in the art that vacuum tubes, magnetic coreelements, non-linear dielectric elements, and the like could be used toprovide the functions of the flip-flops, the a and circuits, the orcircuits, and the other logic cir cuits. With the fundamental dotinterval defined by the clock pulse period, it is apparent thatrelatively straightforward modifications of the code set-up switcheswould permit controlling the clock pulse frequency, in terms of thenumber and type of code elements, to cause all three letter combinationsto be generated in a given length of time. Such modifications of thesignal keyer would be useful in low frequency aircraft radio rangeoperation when radio station identification signals must extend over afixed time interval. The use of the settings of letter selectionswitches to determine a weight for a given letter so as to control dotand dash time durations is shown in US. Patent 2,771,600 to Wright etal. it will be obvious at this point to those skilled in the art, that acontrol signal may be derived in accordance with the settings ofselector switches a, 20b, 200, to control the frequency of clock pulsegenerator 15.

It will thus be seen that the objects set forth above, among those madeapparent from the preceding description, are efiiciently attained and,since certain changes may be made in the above article without departingfrom the scope of the invention, it is intended that all mattercontained in the above description shall be interpreted as illustrativeand not in a limiting sense.

Having described my invention, what I claim as new and desire to secureby Letters Patent is:

1. An automatic signal keyer for generating code messages composed ofdot, dash, and space elements comprising,

(a) a plurality of settable means each including an individual outputterminal for each of said dot, dash, and space elements and an inputterminal;

(b) a source of pulses spaced in accordance with the duration of a dotelement;

(c) interrogating means connected to said input terminals forsuccessively energizing the output terminal to which each of saidsettable means is set for providing control signals in accordancetherewith; and

(d) a first group of serially connected logic circuits responsive tosaid source of pulses and the energized ones of said dot outputterminals of said settable means for generating said dot elements, asecond group of serially connected logic circuits including a portion ofsaid first group responsive to said source of pulses and the energizedones of said dash output terminals of said settable means for generatingsaid dash elements to provide further signals effective to the energizedones of said space output terminals to prevent the generation of saiddot and dash elements.

2. An automatic signal keyer for generating code messages composed ofdot, dash, and space elements comprising,

(a) a plurality of settable means each including an input terminal andan output terminal for each of said dot, dash, and space elements,respectively;

(b) a source of timing pulses spaced in accordance with the duration ofa dot element;

(c) interrogating means for successively energizing the set outputterminal of each of said settable means for selectively providing dot,dash and space element control signals in accordance therewith;

(d) a first group of logical circuits for combining said timing pulsesand control signals representative of dash elements to provide furthersignals effective to generate said dash elements;

(e) a second group of logical circuits, including a portion of saidfirst group, for combining said timing pulses and control signalsrepresentative of dot elements to provide other signals efiective togenerate said dot elements;

(f) a third group of logical circuits connected to the output of saidfirst and second groups of logical circuits; signal means, a codedoutput terminal, and circuit means coupling said signal means to saidcoded output terminal only during time intervals when said first andsecond groups of logical circuits are combining said respective controlsignals and said timing pulses; and

(g) circuit means connected between said third group of logical circuitsand said control signals representative of said space element forinhibiting said circuit means.

3. An automatic Morse code keyer for providing a predetermined sequenceof dot, dash, and space signals comprising,

(a) a plurality of settable means selectably operable to indicate saidpredetermined sequence of dot, dash, and space signals;

(b) a plurality of logical circuits including first and second seriallyconnected bistable circuits and circuit means for summing the outputs ofsaid first and second bistable circuits in parallel;

(c) an oscillator and an output means;

(d) first control means connected to the output of said circuit meansfor coupling said oscillator to said output means;

(e) a sequence of clock pulses the spacing of which is equal to theduration of each of said dot signals:

(f) interrogating means for successively determining the signalindicated by each of said settable means and for providing controlsignals in accordance therewith;

(g) said control signal indicative of a dot signal coupling said clockpulses to the input of said second bistable circuit, said control signalindicative of a dash signal coupling said clock pulses to the input ofsaid first bistable circuit, and said control signals indicative of aspace signal coupled to said first control means for inhibiting thesame; and

(h) second control means responsive to said circuit means for advancingsaid interrogating means to interrogate the next successive settablemeans.

4. in an automatic electronic keyer provided with an encoder for storingcharacters of letters in a call letter sequence, apparatus forgenerating Morse code keying signals comprising;

(a) means for generating and transmitting a train of pulses;

(b) means for systematically searching said encoder for encoded dots,dashes, and long spaces;

(c) means cooperating with said pulses for producing, upon finding insaid encoder a required dot, a dot pulse and a short space pulse, andupon finding 1n said encoder a required dash, a pair of dot pulsesseparated by a short space pulse;

(d) further means cooperating with said pulses for producing, uponfinding in said encoder a required dash, a dot bridging pulse, and uponfinding in said encoder a required long space, a short space bridging ule;

e? and means for bridging two consecutive dot pulses with .a dotbridging pulse and two consecutive short space pulses with a short spacebridging pulse thereby to efiect ultimate transmission of dots, dashesand short and long spaces.

5. An automatic signal keyer for generating code messages composed ofdot, dash, and space elements comprising,

a plurality of multi-position switches each selectively positionable toconnect an input terminal to one of a plurality of output terminals, afirst of said plurality of output terminals representing a dot element,a second of said plurality of output terminals representing a dashelement, and a third of said plurality of output terminals representinga space element;

interrogating means coupled to the input of said switches forsuccessively energizing the output terminal selected by the position ofall of said multi-position switches;

first and second bistable devices;

first circuit means connecting the output of said first bistable deviceto the input of said second bistable device;

a source of pulses for providing a sequence of pulse signals spaced inaccordance with time interval assigned to a dot element;

second circuit means connecting said source to the input of said secondbistable device when said interrogating means energizes any of saidfirst of said plurality of output terminals of said plurality ofmultiposition switches, and connecting said source to the input of saidfirst bistable device when said interrogating means energizes any ofsaid second of said plurality of output terminals of said multi-positionswitches;

means combining the outputs of said first and second bistable devices;and means inhibiting the combined output of both of said first andsecond devices when said interrogating means energizes any of said thirdof said plurality of output terminals of said multi-position switches.

6. An automatic signal keyer for generating code messages composed ofdot, dash, and space elements comprising,

a plurality of settable means each positionable to encode at a set ofoutput terminals a selected sequence of said dot, dash and spaceelements;

a source of equally spaced apart pulses;

a first logical circuit path including a NOT AND circuit, first ORcircuit, a first flip flop circuit, and a second OR circuit, and firstcircuit means connecting said circuits electrically in series in theorder given;

a second logical circuit path including an AND circuit and a second flipflop, and second circuit means connecting said circuits electrically inseries in the order given, and the output of said second flip flop to aninput of each of said first and second OR circuits;

means connecting said source to an input of said NOT AND and ANDcircuits in parallel;

a sequence counter coupled to said plurality of settable means forsuccessively energizing said set of output terminals; and

third circuit means connecting all of said dot encoded terminals to thecontrol input of said NOT AND circuit and connecting all of said dashencoded terminals to another input of said AND circuit.

7. The signal keyer of claim 6 including a tone generator, a gatecircuit, and a coded tone output terminal;

a second NOT AND circuit;

fourth circuit means connecting said tone generator,

said gate circuit, and said coded tone output terminal electrically inseries; and

fifth circuit means coupling the output of said second OR circuitthrough said second NOT AND circuit to the control input of said gatecircuit.

8. The signal keyer of claim 7 further including sixth circuit meansconnecting said energized space encoded terminals to the control inputof said second NOT AND circuit.

9. The signal keyer of claim. 6 wherein said plurality of settable meansare additionally selectively positionable to inhibit said meansconnecting said source to an input of said NOT AND and AND circuits inparallel.

10. In an automatic signal keyer for generating Morse code messagescomposed of dot, dash, and space signals including a plurality of switchmeans selectively settable to one of a dot, dash, or space signalrepresenting position: improved circuitry for ensuring that the durationof a dash signal is three times the duration of a dot signal comprising,

first and second bistable switching devices each having an inputterminal and an output terminal;

means connecting the output terminal of said first device to said inputterminal of said second device;

a source of evenly spaced apart clock pulses;

interrogation means for successively determining the position of eachsaid plurality of switch means;

first circuit means responsive to said interrogation means to couplesaid source to said input terminal of said second device when any ofsaid plurality of switch means is in a dot representing position tochange the state thereof;

second circuit means responsive to said interrogation means to couplesaid source to said input terminal of said first device when any of saidplurality of switch means is in a dash representing position, to changethe state thereof, the change of state thereof further effective throughsaid connecting means to control the state of said second device; and

third circuit means connecting said output terminals of said first andsecond bistable devices in parallel to an output terminal, said outputterminal providing said dot and dash signals.

References Cited by the Examiner UNITED STATES PATENTS 2,409,229 10/46Smith et al. 340-- 348 2,567,944 9/51 Krause et a] 340-345 2,612,5629/52 Baker 178-17 3,021,516 2/62 Spitz et al. 340-345 NEIL C. READ,Primary Examiner.

4. IN AN AUTOMATIC ELECTRONIC KEYER PROVIDED WITH AN ENCODER FOR STORINGCHARACTERS OF LETTERS IN A CALL LETTER SEQUENCE, APPARATUS FORGENERATING MORSE CODE KEYING SIGNALS COMPRISING; (A) MEANS FORGENERATING AND TRANSMITTING A TRAIN OF PULSES; (B) MEANS FORSYSTEMATICALLY SEARCHING SAID ENCODER FOR ENCODED DOTS, DASHES, AND LONGSPACES; (C) MEANS COOPERATING WITH SAID PULSES FOR PRODUCING, UPONFINDING IN SAID ENCODER A REQUIRED DOT, A DOT PULSE AND A SHORT SPACEPULSE, AND UPON FINDING IN SAID ENCODER A REQUIRED DASH, A PAIR OF DOTPULSES SEPARATED BY A SHORT SPACE PULSE; (D) FURTHER MEANS COOPERATINGWITH SAID PULSES FOR PRODUCING, UPON FINDING IN SAID ENCODER A REQUIREDDASH, A DOT BRIDGING PULSE, AND UPON FINDING IN SAID ENCODER A REQUIREDLONG SPACE, A SHORT SPACE BRIDGING PULSE;